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Embedded Software Development Tools
for Intrinsity™ Family

Intrinsity Family

Green Hills Software provides a comprehensive set of development tools for Intrinsity's FastMIPS™ and FastMATH™ processor-based applications. Built upon the foundation of Green Hills Software's outstanding MIPS® compiler, the compiler for Intrinsity's FastMATH
and FastMIPS processors delivers the highest performance code for computationally demanding embedded applications.

Optimizing Compilers

C++/Embedded C++

MULTI® Integrated Development Environment
Source Level Debugger
Graphical Project Builder
Text Editor
Version Control System
Performance Profiler
Run-Time Error Checking
Code Coverage
Remote Target Connection
Instruction Set Simulators

Processors Supported

FastMIPS™
FastMATH™

Intrinsity Optimizing Compiler

The Green Hills Optimizing Compilers for Intrinsity's FastMIPS and FastMATH processors utilize Green Hills Software's MIPS code generator with architecture and processor specific optimizations. Each supported architecture and processor has its own particular pipeline and instruction set characteristics. Intrinsity specific supported features include:

Processor Options - One option for each supported model. This setting determines the instructions permitted.

Position Independent Code (PIC) and Data (PID) - Allows code and data to be created which can be placed anywhere in memory and still run correctly.

MIPS Assembler Compatible Output - Generate assembly language output which is compatible with native MIPS assemblers from MIPS-based workstations from Silicon Graphics and other companies.

Far Function Calls - Handles code that exceeds the limits of the call instruction.

Inline Prologue - Generates inlined code or calls a routine when saving and restoring registers.

Small Data Area - The Green Hills Compilers collect frequently accessed variables into a block of up to 64KB of memory. This enables single instruction access to data within this block, saving code size and improving performance.

FastMATH Matrix Engine Instructions - Every FastMATH processor matrix instruction is supported through a compiler intrinsic, providing efficient access from C/C++. In addition, all assembly level matrix operations are supported, including Memory Access, ALU, Logical, Comparison, Multiply/Accumulate, Inter-Element Movement, and Inter-Element Computation.

FastMIPS and FastMATH Processor Pipeline - The compiler and tool chain have been optimized for FastMATH and FastMIPS processors' 12-stage dual-issue pipeline. The pipeline optimizer will re-order both MIPS core and Matrix Engine instructions, based on latency and subject to data dependency constraints.

64-bit Integers - Supports 64-bit data types, constants, and expressions for all Intrinsity processors.

FastMATH Matrix Registers - The compiler will automatically allocate matrix types to both the FastMATH matrix registers and accumulator registers.