Green Hills, GHS, MULTI, 2000, C, C++, ADA, Ada95, Fortran, Compiler, Simulator, Debugger, RTOS, Velocity, Integrity, BDM, Target Probe, Event Analyzer, TimeMachine, Run Time Analysis, Embedded,Freescale, Starcore, MSC71xx, MSC8101, MSC8102, SC1200, SC140, SC1400, SC2200, SC2400

Embedded Software Development Tools - StarCore Family

Green Hills Software provides a comprehensive set of development tools
for StarCore based applications:

Optimizing C Compiler
ANSI C
K&R C
C++
Embedded C++
Over 100 Advanced Optimizations
Inline Assembly
ELF/DWARF Output
StarCore ABI Compliant

MULTI® Integrated Development Environment
Source Level Debugger
Graphical Project Builder
Text Editor
Version Control System
Performance Profiler*
Run-Time Error Checking
Code Coverage

Processors Supported

MSC71xx
MSC8101
MSC8102
SC1200
SC140
SC1400
SC2200
SC2400

StarCore Optimizing C and C++ Compilers

The Green Hills Optimizing C and C++ Compilers for StarCore utilize Green Hills' global optimizer with architecture-specific optimizations and generated code. Each supported StarCore model has its own particular VLES and instruction set characteristics. These are accommodated in the code generator to produce code best suited for the target processor. The Green Hills StarCore Optimizing C and C++ Compilers supports the following StarCore-specific features:

Processor Options - One option for each supported StarCore model. This setting determines the instructions permitted, as well as the pipeline optimization strategy used.

Constant Data Section - Places all string literals, constants, and initialized variables declared const in C and C++ in a distinct section.

VLES Packing - The StarCore uses variable length execution sets (VLES), which are VLIW-like groupings of instructions. The StarCore compiler can reorder instructions to maximize VLES packing according to the rules of the specific StarCore model being compiled.

Zero Data Area - The StarCore compiler can access data stored at an arbitrary 32-bit address with a single 48-bit instruction. However, to minimize code size, and to increase the VLES packing opportunities, the StarCore compiler can collect frequently accessed data into a 64k block that is located in the low 16-bits of address space. This data can be accessed with a single 32-bit instruction.

Software Pipelining - The StarCore compiler supports the software pipelining optimization on loops with both constant and variable bounds. The compiler detects when software pipelining will decrease the per-iteration cycle count, and performs the optimization.

Hardware Loop Support - The StarCore compiler can generate nested hardware loops up to four levels deep.

ETSI Intrinsic Functions - The StarCore compiler supports a large number of ETSI intrinsic functions to allow the user fine control over fractional arithmetic. The intrinsic functions are recognized by the compiler, and StarCore code, often a single instruction, is inlined. The resulting instructions can be fully optimized by the compiler.